FPGA

Xilinx Zynq device: XC7Z015

Artix-7 FPGA (74K   Slices)

CPU

Dual ARM® Cortex™-A9 MP@866MHz

Memories

§   380 KB (95 Block RAMs) /512 MBytes DDR3   (32-bit bus)

§   256 Mbits Quad-SPI Flash

§   4 GB SD Card

Configuration

§     Join JTAG header for processor and   reconfigurable logic

§     SPI Flash and SD Card

时钟资源

VCXO

25 MHz VCXO controlled by a DAC with SPI   interface (AD5662)

VCTXO

50 MHz VCTXO controlled by a DAC with SPI   interface(AD5662)

PLL

§     2x 14 Programmable outputs clock generators   with integrated VCOs and ultra-low jitter.

§   2 outputs,   integrated VCO, Low- Jitter Clock Generator

前面板

Ethernet

2x 10/100/1000 Base-T RJ45

(Management, SNTP, NTP)

FMC

1x Low-Pin Count FMC slots(LPC)

§     Using HPC-FMC footprint to support extra GTP   channel on board.

§     Vadj fixed to 2.5V

§   FMC connectivity:   34 differential pairs connected (LA pairs), 2 GTP transceiver, 2 F2C clock   pairs, JTAG

光口

2x SFP cages   (double stack)*.

Clocks I/O

4x SMA coaxial connectors (3.3V/50Ω):

§     10 MHz SIN OUT reference clock (PLL)

§     CLK TTL OUT

§     PPS OUT/IN

§   10Mhz IN (TTL/CMOS/ECL/clipped   sine)

LED

Programmable LEDs   (Red/Green)

内部插槽

Internal connector

Samtec PN QSS-025-01-L-D-RA with 30 FPGA logic   programmable pins (6 CPU pins)

Ref Clk

1x SMA 10Mhz IN (TTL/CMOS/ECL/clipped   sine)

JTAG

2x JTAG for FPGA logic-processor(for Xilinx   programming during debugging) and FMC mezzanine

软件

OS

Linux (Kernel   v3.19)

Timing

WRP daemon (node discovery, etc.)

PTPv2 daemon

Protocols

TCP/IP, SSH, SNMP,  TFTP,DHCP, ARP, DNS，HTTP

物理参数

尺寸

233.35mm x 160.0mm

认证

焊接

IPC-A-610 Rev E   Class 2

其它

ISO-9001,   ISO-14001, RoHS

环境要求

温度

-10ºC ~ +50ºC 可扩展至工业要求

湿度

0% ~ 90% RH

其他参数

供电

External 12V DC,   2A

按钮

2 user button / 3 reset buttons (Logic and ARM   resets)

USB

2x mini USB AB (USB-UART bridge)

风扇

12v 接口